发明名称 SEMICONDUCTOR DEVICE
摘要 PURPOSE:To decrease the impedance of power source wirings, by arranging pads between an inner power-source main line and an outer power-source main line, which are provided at the outer part of a chip, using an arbitrary pad as a power source pad, and electrically connecting (wiring connection) the inner power-source main line and the outer power-source main line through said arbitrary pad. CONSTITUTION:An inner power-source main line 11 as a power feeding line for the first fixed power-source potential Vcc (5V) and an outer power-source main line 12 are arranged approximately along the outer size part of an LSI chip 1 so as to increase the amount of power supply from the power source. Bonding pads 6 are linearly arranged between both power-source main lines 11 and 12. Of the pads 6, the pad 6C other than the pads 6A and 6B is wired and connected with an input/output buffer circuit 5C in an input/output buffer region and an Al pattern (wiring). The inner power-source main line 11 and the outer power-source main line 12 are wired and connected with Al patterns 16 and 17 through the pad 6B. Thus, both the inner and outer power-source main lines 11 and 12 are connected in parallel. Therefore, the resistance (impedance) of the power source wirings can be decreased to a large extent.
申请公布号 JPS6281743(A) 申请公布日期 1987.04.15
申请号 JP19850221833 申请日期 1985.10.07
申请人 HITACHI COMPUT ENG CORP LTD;HITACHI LTD 发明人 OTANI HIROSHI
分类号 H01L23/52;H01L21/3205;H01L23/50;H01L23/64 主分类号 H01L23/52
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