| 摘要 |
PURPOSE:To attain sure and simple debugging of a microprogram by using redundancy bits such as an error correction code and a parity bit of a control memory storing the microprogram as trace bits of the microprogram. CONSTITUTION:A trace mode (TRCMD) bit possible for set from a microprocessor MPU1 exists in an error correction code control section 3. A correction control section (CRCTCNT) 4 acts as a correcting circuit of a memory error when the TRCMD bit is 0. When the bit is logical 1, the MPU1 executes an objective program and performs parity check when a control memory CS2 is accessed. A data control section 5 has an analysis command (ANRS) bit possible for set from the MPU1 and an analysis address register (ANADR). When the ANRS bit is logical 1 and the MPU1 accesses the CS2 at an address lower than the ANADR, a trace bit select signal is raised and the error correction code section of the CS2 is read and written. |
