| 摘要 |
PURPOSE:To improve the degree of integration without lowering each function of a cell capacitor section and an element isolation region by forming a groove to a semiconductor substrate and shaping a second conduction type impurity layer in the substrate in the groove section while forming an insulating and a conductor layer to a substrate surface in the groove section in succession. CONSTITUTION:Ions are implanted into an silicon substrate 21 to form a P<+> layer 22. A CVD-SiO2 film 23 is attached and formed on the surface of the silicon substrate 21. An opening 24 is shaped in a predetermined region while using a resist film as a mask. A V-shaped groove 25 is formed in the silicon substrate 21 in the opening 24 section while using the SiO2 film 23 to which the opening 24 is shaped as a mask. A resist film 27 with an opening 26 is formed to the surface of the silicon substrate 21, the ions of an N type impurity are implanted into the silicon substrate 21 while employing the film 27 as a mask, and N type regions 28a, 28b are formed along the side wall of the V-shaped groove 25 from the periphery of the groove 25. The resist film 27 is removed through etching, and an SiO2 film 29 is formed on the whole surface. |
