| 摘要 |
PURPOSE:To interrupt incorrect transmission even if a reset button is depressed in error on the way of serial transmission by connecting an output of a latch circuit to a reset terminal of a CPU and connecting a signal of a reset instruction input part to an input terminal of the CPU. CONSTITUTION:If the reset button 4 is depressed when a microcomputer system 1 is normal, a retriggerable monostable multivibrator 61 generates a pulse with time constant width to clear the latch circuit 62 through an AND gate 5b, but since a signal line (d) is in the initialized state ('H' level), no change is generated inspite of the clear operation. Namely, the reset signal is not applied to the system 1, so that the system 1 can continuously execute arithmetic processing or the like. |
