发明名称 MULTILAYER INTERCONNECTION MEMBER
摘要 PURPOSE:To contrive to improve the operating speed of the information write and readout of a DRAM by reduction in the resistance value of word lines by a method wherein a word line extending in a fixed direction and a stepwise difference present in the MISFET-forming region of a memory cell are put into intersection at a required angle. CONSTITUTION:The MISFET-forming region of the memory cell is provided in the state that a conductive plate 6 is opened so as to expose that section. Thereby, the stepwise difference S having a steep form is present on insulation films 7 and 8 at part of word line formation and on a field insulation film 4 by means of the insulation film 4, conductive plate, etc. The word line 9 is constructed by coating a polycrystalline Si layer 9A with a silicide layer 9B, the compound of a high melting point metal of a lower resistance and silicon. Since the word line and the stepwise difference are in intersection at a required angle, a current route that avoids a higher resistance part than the flat part generating at the stepwise difference, i.e., a current route that does not orthogonally intersect with the end of said stepwise difference, can be provided, and the resistance value of the word line can be reduced.
申请公布号 JPS60109249(A) 申请公布日期 1985.06.14
申请号 JP19830216313 申请日期 1983.11.18
申请人 HITACHI MAIKURO COMPUTER ENGINEERING KK;HITACHI SEISAKUSHO KK 发明人 KOYAMA YOSHIHISA
分类号 H01L27/10;H01L21/3205;H01L21/8242;H01L23/52;H01L27/04;H01L27/108 主分类号 H01L27/10
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