发明名称 SYSTEM DATA PATH STRESSING
摘要 In a data processing system in which data is sent over a data path between at least first and second devices, a clock distribution network is provided with the capability of selectively delaying the clock signal to either the sending or receiving devices to stress the short and long data paths.
申请公布号 DE3462556(D1) 申请公布日期 1987.04.09
申请号 DE19843462556 申请日期 1984.07.03
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 COLLINS, JOHN C.;DEFAZIO, JOHN J.
分类号 G06F11/22;G01R31/28;G01R31/30;G06F1/04;G06F1/12;(IPC1-7):G01R31/28 主分类号 G06F11/22
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