| 摘要 |
<p>PURPOSE:To prevent the attenuation of an input signal by using a switched capacitor to set a voltage gain of the titled sample-and-hole circuit and using a capacitor to hold an output voltage at the sampling. CONSTITUTION:A voltage gain VOUT/VIN is decided by using two switched capacitors 15, 18. When the switch S5 is turned on, the sample mode is obtained and if the voltage gain is set to the inverse of 1, the output signal VOUT is an inverted signal of the input signal VIN. On the other hand, when the switch S5 is turned off, the hold mode is obtained and a capacitor CH holds the level of the output signal VOUT. Through the constitution above, the input resistance is infinite and only the input capacitance is to be considered. Thus, the attenuation of the input signal is prevented without increasing the pattern area even for an output of a D/A converter with a high output impedance as a charge redistribution type D/A converter.</p> |
