发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To detect the malfunction of a counter circuit with a simple circuit constitution by detecting the presence of the coincidence between a specific pattern signal and the output signal of a counter circuit inputting a clock signal and an initial setting signal at the input of the initial setting signal. CONSTITUTION:The clock signal CK synchronizing at every prescribed period and an initial setting signal RST are inputted to a counter circuit 1, and a specific pattern signals (S1-S3) having the same signal pattern as one of a signal pattern selected from output signals Q1-Q3 of the counter circuit 1 are generated (2). When the output signal (Q1-Q3) and the specific pattern signal (S1-S3) are coincident, a coincidence signal P is outputted (3) and a coincidence signal Q retarding the coincidence signal P by a special time synchronously with the clock signal DK is outputted (4). When the initial setting signal RST is inputted, the presence of the coincidence signal Q is detected to output (5) a counter malfunction signal CHK.
申请公布号 JPS6276322(A) 申请公布日期 1987.04.08
申请号 JP19850215303 申请日期 1985.09.27
申请人 NEC CORP 发明人 MOTOHASHI KENICHI
分类号 H03K21/40;H03K23/66 主分类号 H03K21/40
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