发明名称 Logic circuit
摘要 A logic circuit includes a driver transistor and a load transistor formed by a junction type or Schottky barrier type field effect transistor, and an input terminal connected to a gate of the driving transistor. A gate voltage generator is connected to a gate of the load transistor and generates a level higher than the sum of threshold values of the load transistor and the driver transistor and lower than the lowest value of (1) the sum of a built-in voltage of the load transistor and the threshold voltage of the driver transistor and (2) the sum of a built-in voltage of the driver transistor and the threshold voltage of the load transistor.
申请公布号 US4656611(A) 申请公布日期 1987.04.07
申请号 US19850705321 申请日期 1985.02.22
申请人 FUJITSU LIMITED 发明人 SUYAMA, KATSUHIKO
分类号 H01L27/095;G11C11/34;G11C11/409;H01L21/8232;H01L21/8236;H01L27/06;H01L27/088;H03K3/356;H03K19/017;H03K19/0952;(IPC1-7):G11C7/00 主分类号 H01L27/095
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