Aircraft flight data recorder data acquisition system

摘要

A data acquisition system for use in an aircraft flight data recorder receives multiple analog and discrete signals representative of various aircraft parameters. A single address command from the flight data recorder central processing unit (CPU) causes a first multiplexer to select a set of analog signals. Each selected analog signal is amplified by a gain factor under CPU control and passed to track-and-hold circuitry which holds a level of the amplified analog signal upon receipt of a suitable command. The held analog signal levels are passed to a second multiplexer which also receives a set of discrete signals selected by a third multiplexer in response to a CPU address command. A control sequencer sequentially passes each signal at the input of the second multiplexer through an analog-to-digital converter, with the resultant digital signal being loaded into memory. After either all the selected and processed analog signals or the selected discrete signals have been analog-to-digital converted and stored in memory, the control sequencer issues an interrupt signal to the CPU.