Digital frequency synthesizer

摘要

In a digital frequency synthesizer generating a triangular or rectangular voltage, in which number increments of an increment register are alternately added and respectively subtracted in an adder in successive part-periods at the rate of a fixed clock frequency, two mutually independently adjustable increment registers are provided, in which arrangement in each case one register is connected to the adder during one part-period and in each case the other register is connected to the adder during the successive part-period via a change-over switch controlled by the adder.