发明名称 PULSE GENERATING CIRCUIT
摘要 PURPOSE:To output a forecast gate pulse with high accuracy and to prevent the mixture of noise by providing an UP/DOWN period counter and a limit value setting register, correcting the period of the UP/DOWN period counter alternately every time a pulse is inputted and resetting the UP/DOWN period counter. CONSTITUTION:When the 1st pulse is inputted, the UP/DOWN counter 1 is reset and an UP/DOWN changeover device 5 is set to output an UP count signal and the UP/DOWN period counter 1 starts UP count. A coincidence detection circuit 4 compares an output (t) of the UP/DOWN counter 1 with a value (tL) set in advance in a limit value setting register 3, and when t=tL is obtained, a pulse signal is outputted. The comparator 2 compares the output (t) of the UP/DOWN period counter 1 with a constant value t1 set in advance and when t>t1, a low level is outputted and when t<=t1, a high level is outputted. As a result, a forecast gate pulse holding the input pulse always at the center is obtained as an output pulse train of the comparator 2.
申请公布号 JPS6272219(A) 申请公布日期 1987.04.02
申请号 JP19850213777 申请日期 1985.09.25
申请人 MITSUBISHI ELECTRIC CORP 发明人 YASUI MASAAKI
分类号 H03L7/00;H03K5/00;H03K5/1252;H03K5/19 主分类号 H03L7/00
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