| 摘要 |
<p>PURPOSE:To restrict the number of logical operation means existing on respective word lines by providing a circuit for inverting/non-inverting another normal output signal while referring a storing polarity discriminating information bit and forming storing information. CONSTITUTION:When address in a ROM are applied to address line 1-1, a part of them is decided by a word line decoder 102, a one of word lines 1-3 is driven and turned to the high potential and the status of bit lines 1-4 and the state of storing polarity discriminating information bit lines 1-4' are determined by the existence of transistor (TR) 1-5 on the driven word line 1-3. Outputs of the bit lines are selected by a bit line decoder 1-6, one of them is outputted and inverted/non-inverted by an exclusive OR circuit 1-8 on the basis of the storing polarity discriminating information bit and correct storage information '0' or '1' is outputted to an output line 1-7, so that Trs can be formed on the bit positions of the small number of information out of the storage information '0' and '1' and the number of Trs on respective word lines can be restricted to a half or less of the number of bit lines.</p> |
