| 发明名称 |
Via profiling in integrated circuits. |
| 摘要 |
Vias are formed in multilayer integrated circuits by etching of an uncured or partially cured dielectric film prior to etching to define the via. Heating of the partially cured dielectric produces flow prior to final curing. This provides a smooth edge to the via thus reducing the risk of discontinuity in an upper metallisation layer.
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| 申请公布号 |
EP0216581(A2) |
申请公布日期 |
1987.04.01 |
| 申请号 |
EP19860307033 |
申请日期 |
1986.09.12 |
| 申请人 |
STC PLC |
发明人 |
BAKER, ROGER LESLIE;JENNINGS, STEPHEN ROBERT;ALBIN, SACHARIA |
| 分类号 |
H01L21/31;H01L21/311;H01L21/768;H01L23/522;H05K3/00;H05K3/46;(IPC1-7):H01L21/60 |
主分类号 |
H01L21/31 |
| 代理机构 |
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代理人 |
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| 主权项 |
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| 地址 |
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