发明名称 Tri-state in-circuit logic comparator with automatic input/output terminal discrimination
摘要 A logic comparator circuit and system for testing the operation of an operating logic circuit installed a powered system against the operation of a known good, or reference, logic circuit of the same type or style. This is accomplished by applying the power, return and input signals of the operating logic circuit to the reference logic circuit and then comparing the corresponding output signals of each to detect improper operation. The present invention makes the interconnection of the two logic circuits to the logic comparator simple by only requiring that the user designate which terminals of the logic circuits are for power and return. The present logic circuit is provided with means for automatically discriminating between input and output terminals of the two logic circuits, and for clamping a free floating terminal of the operating logic circuit so that it may be detected repeatably.
申请公布号 US4654850(A) 申请公布日期 1987.03.31
申请号 US19850688206 申请日期 1985.01.02
申请人 RODRIGUES, JOHN M.;WICKSTED, MICHAEL G. 发明人 RODRIGUES, JOHN M.;WICKSTED, MICHAEL G.
分类号 G01R31/317;G01R31/3193;H03K17/30;H03K19/21;(IPC1-7):G06F11/00 主分类号 G01R31/317
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