发明名称 Process for fabricating a semiconductor device
摘要 A method of forming an insulating layer having a planar surf on a lower wiring layer having given patterns steps at the shoulders of the patterns. On a lower wiring layer, a lower insulating layer is formed and a heat resistive material is coated over the lower insulative layer to form a substantially a planar top surface and to fill cavities appearing in the surface of the lower insulating layer with the material. Then, etching is carried out to preserve the profile of the surface of the coating layer and to remove the coating layer at portions where through-holes are to be formed. Any cavities in the surface of the lower insulating layer remain filled with the material after etching. An upper insulating layer is deposited on the exposed lower insulating layer and the remaining part of the coating layer. Through-holes and an upper wiring layer of given patterns are formed so that the upper wiring layer has no contact with the remaining part of the coating layer and so that the remaining part of the coating layer is never externally exposed.
申请公布号 US4654113(A) 申请公布日期 1987.03.31
申请号 US19850698901 申请日期 1985.02.06
申请人 FUJITSU LIMITED 发明人 TUCHIYA, TAKAHIRO;TUKUDA, KAZUAKI;TAKADA, TADAKAZU;GOTO, HIROSHI
分类号 H01L21/768;H01L23/532;(IPC1-7):B44C1/22;C03C15/00;C03C25/06 主分类号 H01L21/768
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