发明名称 AMORPHOUS SILICON THIN FILM TRANSISTOR
摘要 PURPOSE:To enable the control of a threshold voltage at a predetermined value with high accuracy, great facility and good reproducibility by forming an impurity doped buried layer by burying a thin layer doped with impurities inside an amorphous silicon alloy thin film as an active layer. CONSTITUTION:A Cr gate electrode 7 is formed on a glass substrate 1. Next, a gate insulating film 8, an active layer 2 including an impurity doped buried layer 6, and a contact layer 5 are formed in order. In this case, a silicon nitride oxide film using a mixed gas of SiH4+N2O+N2 for the gate insulating film 8, an a-Si:H using a mixed gas of SiH4+H2 for the active layer 2, an n-type a-Si:H using a mixed gas of SiH4+PH3+H2 for the impurity doped buried layer 6 and the contact layer 5 are employed. After removing unnecessary a-Si:H layer, a source electrode 3 and a drain electrode 4 are formed by use of Mo and lastly unnecessary n-type a-Si:H layer remaining between the source and drain electrodes 3 and 4 is removed.
申请公布号 JPS6267872(A) 申请公布日期 1987.03.27
申请号 JP19850207931 申请日期 1985.09.20
申请人 TOSHIBA CORP 发明人 IBARAKI NOBUKI;NOUGA JIYUNKO;SAKAI KEIJI
分类号 H01L29/78;H01L27/12;H01L29/786 主分类号 H01L29/78
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