发明名称 State logic testing device for a logic circuit
摘要 A logic system of the type which has means for applying two-state logic testing signals to an input of a logic circuit to be tested is disclosed. A logic circuit to be tested has two output logic states. The system comprises control means for applying control signals having two logic states to the input of the logic circuit to be tested. The value of the two output logic states is dependent respectively on two input logic states of the control signals applied to the input of the logic circuit to be tested. Override means imposes each logic state of the test signals on the input of the logic circuit to be tested, independent of the logic state of the control signals.
申请公布号 US4652815(A) 申请公布日期 1987.03.24
申请号 US19830472055 申请日期 1983.03.04
申请人 COMMISSARIAT A L'ENERGIE ATOMIQUE;FRAMATOME & CIE;MERLIN GERIN 发明人 COLLOMBET, MICHEL
分类号 G01R31/28;G01R31/317;G01R31/319;G21C17/00;(IPC1-7):G01R15/12;G01R19/14;G01R31/02 主分类号 G01R31/28
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