发明名称 VECTOR PROCESSOR
摘要 PURPOSE:To reduce overheads before the start of transmission of operand data that is sent to an arithmetic unit or a memory requester from a vector register unit, by carrying out the transmission of the operand data in accordance with each state. CONSTITUTION:It is confirmed that an operand register is free when the propriety is decided for start of an instruction. If it is decided that the start of instruction is possible, the information is sent to a vector register VR unit 2 from an instruction control unit 1 in a start mode. In this start mode the unit 2 omits confirmation for the presence of effective data for chaining as long as the information value is equal to '1'. Then the unit 2 starts instantaneously starts transmission of the operand data. Thus it is possible to accelerate the start of transmission of the operand data delayed by an undesired deciding action of a control system between the unit 2 and an arithmetic unit 4 or a memory requester 3. As a result, the overheads are reduced.
申请公布号 JPS6265169(A) 申请公布日期 1987.03.24
申请号 JP19850203269 申请日期 1985.09.17
申请人 HITACHI LTD 发明人 ABE HITOSHI
分类号 G06F17/16;G06F15/78 主分类号 G06F17/16
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