发明名称 DEFLECTION AMPLIFIER CIRCUIT
摘要 PURPOSE:To reduce the power loss of a bias circuit by forming a bias current control voltage formed by supervising a differentiation voltage being the differentiation of a step wave signal onto a DC voltage, using the superimposed voltage at the trailing period of the step wave signal and only the DC voltage during the other periods so as to flow a bias current of an amplifier circuit. CONSTITUTION:A rising step wave deflection signal 15 is inputted also to a differentiation circuit 17, where a positive differentiation pulse is formed and it is inputted to a pulse amplifier 19, in which a DC voltage DELTAV is superimposed and the result is inputted to a base of a transistor (TR) 22. Further, a falling step wave deflection signal 16 is inputted to a differentiation circuit 17', since the differentiation pulse at the trailing period is outputted at a point B of the base of a TR 22', the voltage waveform at the point B is shown in figure (d). Figures (a), (c) show an output voltage waveform at output terminals 12, 12', the current of the bias circuit is increased at the trailing period and the current of the bias circuit is decreased during the leading period an the flat period so as to largely reduce the mean current of the bias circuit as a whole.
申请公布号 JPS6260362(A) 申请公布日期 1987.03.17
申请号 JP19850199745 申请日期 1985.09.10
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 SAKAI SATORU
分类号 H04N3/16 主分类号 H04N3/16
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