SEMICONDUCTOR STORAGE DEVICE

摘要

PURPOSE:To a high-speed operation of a column selecting part by providing a pair of polycilicon high resistance loads between a pair of bit lines and an earth power supply to which the information on the memory cells set in a matrix form is delivered. CONSTITUTION:A word line WL and a pair of bit line BL and the inverse of BL are connected to an FF type memory cell 1 in a memory cell array. While the sources of a pair of load n-type MOSFETs QN1 and QN2 are connected to the line BL and the inverse of BL together with the gates and drains connected to a voltage power supply respectively. A column selecting part 2 consists of a pair of n-type MOSFETs QN3 and QN4 and the drains and sources connected to the line BL and the inverse of BL and a data line DB and the inverse of DB respectively. Then the part 2 is controlled by the control signal VG for column selecting part. In addition, a pair of polycilicon high resistance loads R1 and R2 are connected between the line BL and the inverse of BL and an earth power supply respectively. Thus a high-speed operation is secured for the part 2.