发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 <p>PURPOSE:To read the data at an always stable and fast speed by reducing the electric potential difference of a pair of column lines after the address inputted to the line decoder is changed and the prescribed time passes. CONSTITUTION:When one line is selected by the output of a row decoder 66, plural memory cells 64 and dummy memory cells 65 are simultaneously driven. By the output a column decoder 67, one transistor 68 is made into an on condition selectively, and through the transistor 68, one column 61 is linked to one side input terminal of a sense amplifier 69. When the electric potential of the selected column line 61 and a dummy column 62 is sufficiently opened, the data are detected by the sense amplifier 69 and the data Dout are outputted from an output buffer 73. After the data Dout are outputted from an output buffer 73, the electric potential of the line 63 is reduced to the value with the low electric potential as well as the above-mentioned. When the electric potential of the line 63 is reduced, the value of the on-resistance of the dummy memory cell 65 is increased. Thus, the electric potential of the dummy column 62 is advanced and the electric potential difference in the mutual section of the column 61 and the dummy column 62 is reduced.</p>
申请公布号 JPS6258488(A) 申请公布日期 1987.03.14
申请号 JP19850197125 申请日期 1985.09.06
申请人 TOSHIBA CORP 发明人 IWAHASHI HIROSHI
分类号 G11C11/41;G11C11/34;G11C17/00;G11C17/18 主分类号 G11C11/41
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