发明名称 MANUFACTURE OF JOSEPHSON INTEGRATED CIRCUIT
摘要 PURPOSE:To enable multiple classes of Josephson junctions having various characteristics to be formed on the same plane by removing a first junction forming layer through etching except the required portion, and thereafter forming a second junction forming layer which has a tunnel barrier layer consisting of different material or having a different thickness from the first junction forming layer. CONSTITUTION:Formed on the whole surface of a substrate 11 is a first junction forming layer 12 in which a lower electrode and an upper electrode consisting of superconducting material are coupled together through a tunnel barrier layer, a first etching mask 13 is formed on the required portion thereon, and the said first junction forming layer 12 which is no covered with the etching mask 13 is etched away. Thereafter, on the whole surface of the substrate 11, a second junction forming layer 14 is formed which has a tunnel barrier layer consisting of different material or having a different thickness from the said first junction forming layer, a second etching mask 15 is formed on the required portion thereon, and the said second junction forming layer 14 which is not covered with the second etching mask 15 is etched away. Thus, multiple classes of junction forming layers 12, 14 are formed on the same plane.
申请公布号 JPS6257263(A) 申请公布日期 1987.03.12
申请号 JP19850195946 申请日期 1985.09.06
申请人 AGENCY OF IND SCIENCE & TECHNOL 发明人 HIDAKA MUTSUO
分类号 H01L39/24 主分类号 H01L39/24
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