发明名称 FREQUENCY CLAMPING CIRCUIT
摘要 PURPOSE:To reduce a sense error by delivering the primary pulse in response to an input from the 1st monostale multivibrator and adding the output of said pulse to the output of the long pulse width obtained by triggering the 2nd monostable multivibrator. CONSTITUTION:When the 1st pulse is supplied to an input terminal, a primary output pulse PQ1 is delivered from the 1st monostable multivibrator M1. Then the 2nd monostable multivibrator M2 is triggered to deliver an output pulse PQ2 having the pulse width equal to or larger than the output of the M1. Then an AND is obtained between an input pulse and the pulse PQ2. Therefore the output of an IC1 for decision of frequency is set at a low level. When the frequencies of the n-th and its subsequent input pulses exceed the clamping frequency, the output of the IC1 is set at an H level.
申请公布号 JPS60157325(A) 申请公布日期 1985.08.17
申请号 JP19840013142 申请日期 1984.01.26
申请人 MERETSUKU:KK 发明人 HORI HIROBUMI
分类号 H03K5/19;G01R23/15;H03K5/153 主分类号 H03K5/19
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