| 摘要 |
<p>PURPOSE:To prevent a malfunction during writing and reduce power consumption in an IL<2>RAM by replacing the conventional IL<2>RAM connecting transistor by an npn transistor and separating a grounding terminal of a memory cell from an emitter terminal of the connecting transistor. CONSTITUTION:Mutually intersected and connected npn transistors Q43, Q44 and pnp transistors Q41, Q42 operating as loads are constituted by mutually wiring two I<2>L gates. Q41 and Q44, and Q42 and Q43 respectively correspond to one I<2>L gate. Q45, Q46 are ordinary npn transistors, namely, forward operating transistors. The Q43, Q44 are reversely operating transistors in the I<2>L gate. Accordingly, the Q45, Q46 are reversely operate to the Q43, Q44. A cell power source line W1 is an injector line of the I<2>L. During operating, a constant current source is connected to the cell power source line WI and bit lines B, -B.</p> |
