发明名称 Output circuit device with stabilized potential.
摘要 <p>An output circuit device according to the present invention comprise first and second circuit means (1,3) both having first and second type MOS transistors connected in parallel, and a load capacitor means (13) connected between the output terminal and the ground for charging and discharging electric charge of an output signal.</p><p>The sources of said first and second type MOS transistors are connected to a first and second power supply respectively.</p><p>The second circuit means is connected between the output of said first curcuit means and an output terminal. The sources of the first and second type MOS transistors in the second circuit means are connected to the first and second power supplies respectively. The first and second type MOS transistors have a first threshold voltage level.</p><p>Undershoot and overshoot phenomena are suppressed when the output potential of the first and second type MOS transistors in the second circuit means reaches the threshold voltage level.</p>
申请公布号 EP0212584(A2) 申请公布日期 1987.03.04
申请号 EP19860111280 申请日期 1986.08.14
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 TANAKA, YASUNORI
分类号 H03K19/0175;H03K17/687;H03K19/003;H03K19/0185;H03K19/0948 主分类号 H03K19/0175
代理机构 代理人
主权项
地址