发明名称 VIDEO SIGNAL PROCESSING CIRCUIT
摘要 <p>PURPOSE:To execute scanning line interpolation after speed conversion without need of an additional movement detecting speed converting circuit by time duplexing a time compressed movement detecting signal with a time compressed color signal, separating them individually after their speed conversion, then time elongate them to obtain speed converted color signal and movement detecting signal. CONSTITUTION:A brightness signal (Y) and the color signal (C) which are separated from each other by an in-field Y/C separating circuit 31 and an inter-frame Y/C separating circuit 32 are mixed by a mixer 33 at a specific proportion. The C-signal and a 4-bit movement detecting signal MD2 from a movement detecting circuit 5 are inputted to an encoder 91 and time-duplexed. The speed of the output from the encoder 91 is doubled by a speed converting circuit 93, and is inputted to a decoder 92 at a clock rate of 8fsc. The output from the circuit 92 is inputted to a terminal 921, and supplied to latch circuits 922 and 927. The high order 4 bits and the low-order 4 bits in the latch circuit 927 are parallel/serial converted by a latch circuit 928, and become a time- elongated movement detecting 4-bit signal MD2 of a rate 4fsc.</p>
申请公布号 JPS6249795(A) 申请公布日期 1987.03.04
申请号 JP19850188677 申请日期 1985.08.29
申请人 TOSHIBA CORP 发明人 IGA HIROYUKI
分类号 H04N11/20 主分类号 H04N11/20
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