| 摘要 |
An improved bipolar transistor structure having an emitter region formed over a base region, and a thin wall of insulating material, such as a thermal oxide, along the edges of the emitter region. The wall of insulating material electrically isolates emitter and base contact area, and greatly reduces the size of inactive portions of the base region, thereby reducing the base resistance and base-collector capacitance, and increasing the speed of operation of the transistor. The emitter region comprises a first layer of arsenic-doped polycrystalline silicon (poly) and a second layer of phosphorous-doped semi-insulating polycrystalline silicon (SIPOS), to provide the best combination of desirable device characteristics.
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