| 摘要 |
A high-speed rounding circuit for producing a rounded binary number without using extensive and costly logical AND circuitry. The circuit includes a current-mode logic module in which multiple transistors have their emitter terminals selectively wired together to produce intermediate signals that are the logical OR of the inverted forms of bit position values from the unrounded number. The intermediate signals are then combined with the original unrounded bit position values in logical exclusive OR circuit modules, to produce the desired rounded bit position values in a parallel fashion, but without the need for extensive and costly circuitry.
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