| 摘要 |
<p>Static random access memory device composed of resistance loaded flip flop circuits. Adjacent memory cells are arranged to form memory cell pairs composed by a unit cell 1 and a unit cell 2. Load resistors (R11, R12) for the unit cell 1 and those (R21, R22) for the unit cell (2) are formed on different insulation layers (8, 9) and stacked on each other. By taking such a configuration, the pattern of the load resistors is extended over an adjacent memory cell. So, the length and resistance of the resistors are increased by two compared to those of the prior art. The length of the load resistors can be cut down for compensating the increase of the resistance. This enables fabrication of devices 1/2 size of the prior art, and the packing density of the devices is increased by four.</p> |
