| 摘要 |
A finite impulse response sampled data filter is provided with parallel tapped delay lines (37-41; 32-36) to one of which scaled (31) input samples are applied and to the other of which non-scaled samples are applied. The scaled and non-scaled signal samples from the parallel tapped delay lines are both made available to weighting circuits (42-46) for utilization thereby in producing weighted samples which are added (47) to produce the filtered output samples. |
