| 发明名称 |
POWER-ON RESET CIRCUIT ARRANGEMENTS |
| 摘要 |
An integrated-circuit power-on reset arrangement which starts in a known state due to transistor sizing and to a current mirror circuit at least initially holding a bistable circuit in a predetermined one of its states. |
| 申请公布号 |
ZA8605416(B) |
申请公布日期 |
1987.02.25 |
| 申请号 |
ZA19860005416 |
申请日期 |
1986.07.21 |
| 申请人 |
THE GENERAL ELECTRIC COMPANY, PLC |
发明人 |
KEITH LLOYD JONES |
| 分类号 |
H03K3/356;H03K17/22 |
主分类号 |
H03K3/356 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
|
| 地址 |
|
