Doping for low capacitance amorphous silicon field effect transistor.

摘要

An amorphous silicon thin film FET is doped and structured to be particularly useful for use in liquid crystal display circuits. In particular, critical FET dimensions are provided along with doping levels and locations which permit optimal reduction of source to gate capacitance, while at the same time, preventing the occurrence of large contact voltage drops. Critical dimensions include active channel length, source-gate overlap, and amorphous silicon thickness. A critical relationship is established amongst these parameters and amorphous silicon doping levels.