| 摘要 |
PURPOSE:To prevent random inversion of memorized data and thereby to attain high reliability by a method wherein a P-type well region of a specified thickness is provided in a surface region of a substrate, a plurality of memory cells and their peripheral circuits are built therein, and a voltage not higher than a ground potential VSS is applied to the well region, and a voltage not lower than the ground potential VSS is applied to the substrate. CONSTITUTION:On an N-type Si substrate 30, N-type layers 2, 3, 4, 5, transfer gates 6, 8, and electric charge storage gates 10, 11 constitute a dynamic memory cell. Under this method, a P-type well 20 is so this as to be 4-5mum that the number of electron- and-hole pairs generated in a well under alpha-particle radiation is far smaller than under a conventional method. The number of electrons collected in a storage capacitor is so small as to be not more than one tenth of the number under the conventional method. Generally, the P-type well 20 is fixed at a ground potential VSS or at a voltage VBB that is not higher than the ground potential VSS. The N-type Si substrate 30 is fixed at the ground potential VSS or at a power source voltage VDD that is not lower than the ground potential VSS. With the number of electrons being smaller than that of the stored electric charges, inversion does not take place of the data stored in the memory cell. |
