| 摘要 |
PURPOSE:To prevent a MIS transistor input pad side diffused resistor P-N junction from breakdown by a method wherein a current path is rendered larger with the depth of impurity diffusion deeper in the diffused resistor of the input protecting circuit of the MIS transistor at its portion nearer to the input pad for the dispersion of electric field concentration resulting from an input surge voltage. CONSTITUTION:A diffused resistor 2 is formed in a P-type semiconductor substrate 7 and has, in its portion near an input pad 1, a diffusion depth of approximately 2.5mum, produced by using the conventional P diffusion technique. The next portion has a diffusion depth of approximately 1.5mum, similarly produce. The remotest portion has a 0.5mum-deep As-implanted N<+> layer, formed simultaneously with the impurity diffusion into a MIS transistor source/drain. The diffused resistor 2 is set to present a resistance value of not less than 600OMEGA. It is so designed that an input surge voltage measures approximately up to 30V at the end of the diffused resistor 2 so that the drain junction in a protecting MIS transistor 3 may be kept from breakdown due to an input surge voltage. Further, with the diffused resistor 2 being diffused deeper toward the input pad 1, the P-N junction is protected from disconnection attributable to a high input surge voltage applied to the portion nearest to the input pad 1. |
