| 摘要 |
PURPOSE:To improve the junction dielectric strength between a drain and a substrate, by implanting ions for writing information with the drain region of MIS FET isolated therefrom. CONSTITUTION:Ion implantation is performed while the drain 6 side of a poly Si gate electrode 4 of a normally-off MIS FET is masked with resist mask, so that a channel implanted region 7 is formed separated from the drain 6. Accordingly, the junction between the drain 6 and the substrate 1 has a sufficiently high dielectric strength of several tens to several hundreds volts. Further, the resist used for masking a part of the gate electrode can be utilized also as the resist for masking the MIS FET not subjected to the ion implantation, which contributes to the simplification of the process. |
