发明名称 DIGITAL DEMODULATION SYSTEM
摘要 PURPOSE:To improve the 2nd equalization capability limit by applying logic operation to a control signal of each tap at an imaginary part in a transversal equalizer among a quadrant discrimination output, a position discrimination output and an area discrimination output. CONSTITUTION:A 64QAM wave input signal enters a transversal filter 3 comprising a delay circuit and a weight circuit, a control signal from weight control circuits 2R, 2L is received to reject an inter-code interference of the input signal and an output signal without inter-code interference is obtained at the output of a demodulator 4. A real part weight control circuit 2R receives quadrant discrimination signals D1p, D1q and error signals Ep, Eq as the input to output weight control signals R+ or -1, R+ or -2. An imaginary part weight control circuit 2I receives quadrant discrimination signals D1p, D1q, a position discrimination signal S1, and an area discrimination signal S2 and error signals Ep, Eq to send weight control signals I+ or -1, I+ or -2.
申请公布号 JPS6239922(A) 申请公布日期 1987.02.20
申请号 JP19850178504 申请日期 1985.08.15
申请人 NEC CORP 发明人 YOSHIDA YASUTSUNE;TAWARA MASATO;YAGI MANABU;MATSUURA TORU
分类号 H04L27/38;H04B3/06;H04L27/00 主分类号 H04L27/38
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