| 摘要 |
<p>PURPOSE:To generate a high-level control signal accurately at a prescribed timing without performing the software processing of a CPU by changing a pointer with a latch pulse to change the address of a memory. CONSTITUTION:The pulse from a comparator 3 is supplied to a pointer 7, and the pointer 3 is incremented to designate the third data block, and the pulse from the comparator 3 is supplied to a counter 6 to reset and start the counter 6. The output timing of output data of the third data block is judged by the comparator 3, and outputs corresponding to the third output data are obtained in output terminals 151-15N. Hereafter, the pointer 7 is incremented to obtain outputs corresponding to output data of prescribed data blocks successively in output terminals 151-15N simultaneously at a prescribed timing similarly. Thus, the CPU is released from the interrupt processing, etc. to perform the other software processings.</p> |
