| 摘要 |
The present invention relates to chrominance decoding circuits and more particularly to a novel circuit for demodulating chrominance signals, B-Y or R-Y. This circuit comprises, connected in series, a multiplier multiplying the U or V-modulated chrominance signal by itself, a filter giving at the output the square (B-Y)2 or (R-Y)2 of the chrominance signal, a device for extracting the square root giving an absolute value 3BOND B-Y 3BOND or 3BOND R-Y 3BOND of the chrominance signal, and a multiplier multiplying said absolute value by the sign of the chrominance signal B-Y or R-Y to obtain at the output said chrominance signal, B-Y or R-Y.
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