发明名称 |
Superposed quadrature modulated baseband signal processor |
摘要 |
A signal processor for providing a continuous raised cosine output signal having no jitter or intersymbol-interference and with controllable main and side lobes. An NRZ input signal is converted to a double interval raised cosine pulse signal having an amplitude normalized to 1.0. Another single interval raised cosine pulse signal having a peak amplitude (A-1) is superposed with the former raised cosine pulse to provide the output signal.
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申请公布号 |
US4644565(A) |
申请公布日期 |
1987.02.17 |
申请号 |
US19840619740 |
申请日期 |
1984.06.12 |
申请人 |
CANADIAN PATENTS AND DEVELOPMENT LIMITED-SOCIETE CANADIENNE DES BREVETS ET D'EXPLOITATION LIMITEE |
发明人 |
SEO, JONGSOO;FEHER, KAMILO |
分类号 |
H04L25/03;H04L27/36;(IPC1-7):H04B15/00 |
主分类号 |
H04L25/03 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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