Circuit arrangement for synchronizing of clock-signal generated at a receiving station with clock-signals received in telecommunications systems with digital transmission of information

摘要

The inventive circuit arrangement effects that a too wide adjustable deceleration of a clock generator is prevented, if gaps occur in a received signal, and that possible adjustment faults are compensated immediately when the receiving signal appears again. Thus the phase relation of the clock generator is adjusted to the phase of the received signal very soon.