发明名称 INPUT/OUTPUT CONTROLLER
摘要 PURPOSE:To shorten the execution time of scan pass and to reduce the amount of hardware by giving simultaneously shift-in data, shift-out data, and its expected value in scan pass of plural logic control circuits and checking them. CONSTITUTION:A scan pass control circuit 101 reads out shift data, which are given to shift-in terminals of logic control circuits 102 and 103, from a storage circuit 104 and gives a shift-in clock 115 to them. Simultaneously, shifted-out data 113 and 114 and expected value data 117 and 118 from the storage circuit 104 are given to a comparing circuit 105 and are compared. The comparing circuit 105 compares shift-out data 113 and 114 of logic control circuits 102 and 103 with expected value data to check data; and if data disaccord is detected, the corresponding logic control circuit is displayed. If data coincide, the scan pass control circuit 101 reads out the next shift-in data from the storage circuit 104 and performs similar check.
申请公布号 JPS6235946(A) 申请公布日期 1987.02.16
申请号 JP19850175127 申请日期 1985.08.08
申请人 NEC CORP 发明人 SUDA MITSUHIRO
分类号 G06F11/22;G06F13/00 主分类号 G06F11/22
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