发明名称 SEMICONDUCTOR DEVICE AND MANUFACTURE THEREOF
摘要 PURPOSE:To enable to shorten the manufacturing period by specifying a part of lower layer wirings by a hole between patterning layers formed in an interlayer insulating film, thereby improving the degree of freedom of design. CONSTITUTION:Interlayer connecting holes 6, 7, 8 for connecting upper layer wirings with lower layer wirings and a hole 5 between patterning layers for cutting part of the lower wirings are formed at the prescribed portion of an interlayer insulating film 4. Metal for the second layer wirings is coated on the film 4, and the second layer wiring patterns 10, 11, 12, 13 are formed by patterning by anisotropic dry etching method. In this case, a part 9 of the pat tern 3 is etched through the hole 5. Thus, since a part of the shape of the first layer wiring pattern 3 can be varied through the hole 5 formed simultaneously with the connecting holes 6-8 in case of patterning the second layer wirings, various circuit patterns can be formed by using an wiring steps only the second layer wirings in case of manufacturing a semiconductor device.
申请公布号 JPS6235537(A) 申请公布日期 1987.02.16
申请号 JP19850175115 申请日期 1985.08.08
申请人 NEC CORP 发明人 KANO ISAO
分类号 H01L21/3205;H01L21/82;H01L23/52;H01L27/118 主分类号 H01L21/3205
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