| 摘要 |
PURPOSE:To simplify a decimal data exception detecting circuit by taking a decimal data exception by '0'-5 with regard to a value which has added 6 to an input data at the time of a decimal addition, and taking the decimal data exception by '0'-5 with regard to a value which has converted the input data to one's complement at the time of a decimal subtraction. CONSTITUTION:A+6 adder 11 is used at the time of a decimal addition, and adds 6 to each digit of an input data. A complementing circuit 12 is used at the time of a decimal subtraction, and converts an input data B to one's complement. A main adder 14 brings an input data A and the input data A to which '6' is added, to a binary addition at the time of a decimal addition, and brings the input data A, the input data B which is converted to one's complement, and CARRY = 1, to a binary addition at the time a decimal subtraction. A decimal data exception detecting circuit 16 detects a value of '0'-5 with regard to a digit of an output data of a selector 13, in case of both the decimal addition and the decimal subtraction, and when a value of '0'-5 is detected, it is reported as a decimal data exception. |
