发明名称 INFORMATION PROCESSOR
摘要 PURPOSE:To curtail hardware quantity by integrating an approximate inverse number table for storing a divisor whose use frequency is low, and a memory decoder for storing a control signal to an operating circuit, in the same storage means, and switching and using a read-out address and an output data. CONSTITUTION:In an approximate inverse number table/memory decoder 30, an approximate inverse number data of a divisor, and a part of plural groups of control signals to an operating circuit 25 are stored by plural words each in mutually different addresses. Switching of an approximate inverse number table function or a memory decoder function of the approximate inverse number table/memory decoder 30 is executed by an address selector 40 in accordance with an indication of a micro-instruction which is sent out onto a signal line 78 from a micro-instruction register 20.
申请公布号 JPS6232535(A) 申请公布日期 1987.02.12
申请号 JP19850172588 申请日期 1985.08.06
申请人 NEC CORP 发明人 ENDO TOMOHIKO
分类号 G06F7/52;G06F7/535 主分类号 G06F7/52
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