| 摘要 |
<p>PURPOSE:To easily establish synchronization by inserting a code word consisting of continuous '1s' and '0s' between frames as a frame synchronizing code when a digital signal is converted from one bit consisting of m bits into n bits or reversely. CONSTITUTION:A data signal S1 is serial/parallel-converted 1 and a parallel signal consisting of m bits is inputted to a mBnB encoding circuit 2. On the other hand, a frame pulse F is inputted to the circuit 1 and a frame pattern insertion circuit 3. The output of the circuit 3 is connected to a frame pattern input of the circuit 2 and continuous '1s' and '0s' are inserted as a frame pattern. A parallel signal consisting of n bits and outputted from the circuit 2 is parallel/serial-converted 4 and a serial signal S2 is outputted. A synchronizing circuit 5 serial/parallel converts 6 the frame pattern detected from the signal S2 into a parallel signal consisting of n bits and a parallel signal consisting of m bits which is formed through an mBnB decoding circuit 7 is converted 8 into a serial signal S1 to send the signal S1. Consequently, frame synchronization and block synchronization can be simultaneously established.</p> |
