发明名称 |
Video signal generating circuit |
摘要 |
A video signal generating circuit comprises a buffer memory for storing character codes and control data for control of vertical character positions, a character pattern memory having a plurality of stored character patterns which are selected by the output of the buffer memory, and a control circuit for successively reading the character codes and control data from the buffer memory and the character patterns from the character pattern memory. The value of a logical operation of raster data generated by the control circuit and the control data is used as raster data or an effective raster scan signal for the character pattern memory.
|
申请公布号 |
US4642622(A) |
申请公布日期 |
1987.02.10 |
申请号 |
US19830481937 |
申请日期 |
1983.04.04 |
申请人 |
HITACHI, LTD. |
发明人 |
ITO, SYOICHI;AKAHORI, KEN-ICHI |
分类号 |
B41J2/44;G06K15/12;H04N1/21;(IPC1-7):G09G1/06 |
主分类号 |
B41J2/44 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|