| 摘要 |
An improved voltage level shifter circuit employs pairs of P and N-channel devices which are operated in response to control signals to generate a voltage shifted output signal that corresponds in timing and polarity to an input data signal. The P and N-channel devices interact in latched pairs to maintain logic levels for the output signal. The P-channel and N-channel devices of each pair are disconnected prior to each logic level change for the output signal so that the devices of each pair do not oppose one another in changing the logic level of the output signals. |
