| 摘要 |
PURPOSE:To detect corresponding horizontal scanning period in an odd-numbered and an even-numbered field with inexpensive circuit constitution by composing a circuit of a counter, a PLL, a flip-flop, etc. CONSTITUTION:Once a signal of a horizontal scanning period arrives at an input terminal 1, a counter 5 starts counting a signal outputted from a voltage-controlled oscillator 9 in a PLL6 as clock pulses and, when its count time reaches, for example, 3/4H, a flip-flop 2 is reset. Therefore the flip-flop 2 outputs a pulse train which corresponds to a scanning line number without reference to equalization pulses and vertical synchronizing pulses. This pulse train is applied to one input terminal of a phase comparator 7 in the PLL6 to control its output oscillation frequency. On the other hand, the output signal of a 1/N frequency divider 10 is supplied to a delay circuit 3 to extract a pulse train having a repetitive frequency delayed by a prescribed period behind the beginning of each horizontal scanning frequency. |
