| 摘要 |
<p>A memory circuit provided with an improved word line noise preventing circuit is disclosed.</p><p>The memory circuit is of the type having a pair of digit lines, a plurality of word lines intersecting with the digit lines, a plurality of memory cells, a sense amplifier coupled to the pair of digit lines and a plurality of noise preventing circuits provided for the word lines. The memory is featured in that the noise preventing circuits are disenabled during the period when the sense amplifier amplifis the voltage difference between the pair of digit lines.</p> |
